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電子發(fā)燒友網(wǎng)>電子資料下載>傳感與控制>低功耗精密模擬微控制器雙模數(shù)轉(zhuǎn)換器ADuC7061/ADUC7060數(shù)據(jù)表

低功耗精密模擬微控制器雙模數(shù)轉(zhuǎn)換器ADuC7061/ADUC7060數(shù)據(jù)表

2017-10-20 | rar | 1.30 MB | 次下載 | 免費

資料介紹

  The ADuC7060/ADuC7061 series are fully integrated, 8 kSPS, 24-bit data acquisition systems incorporating high performance multichannel sigma-delta (Σ-Δ) analog-to-digital convertersADCs), 16-bit/ 32-bit ARM7TDMI? MCU, and Flash/EE memory on a single chip. The ADCs consist of a primary ADC with two differential pairs or four single-ended channels and an auxiliary ADC with up to seven channels. The ADCs operate in single-ended or differential input mode. A single-channel buffered voltage output DAC is available on chip. The DAC output range is programmable to one of four voltage ranges. The devices operate from an on-chip oscillator and a PLL generating an internal high frequency clock up to 10.24 MHz. The microcontroller core is an ARM7TDMI, 16-bit/32-bit RISC machine offering up to 10 MIPS peak performance; 4 kB of SRAM and 32 kB of nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI core views all memory and registers as a single linear array. The ADuC7060/ADuC7061 contains four timers. Timer1 is a wake-up timer with the ability to bring the part out of power saving mode. Timer2 is configurable as a watchdog timer. A 16-bit PWM with six output channels is also provided. The ADuC7060/ ADuC7061 contains an advanced interrupt controller. The vectored interrupt controller (VIC) allows every interrupt to be assigned a priority level. It also supports nested interrupts to a maximum level of eight per IRQ and FIQ. When IRQ and FIQ interrupt sources are combined, a total of 16 nested interrupt levels is supported. On-chip factory firmware supports in-circuit serial download via the UART serial interface ports and nonintrusive emulation via the JTAG interface. The parts operate from 2.375 V to 2.625 V over an industrial temperature range of ?40°C to +125°C.

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