資料介紹
W89C841F is a highly integrated PCI Fast Ethernet MAC controller with embedded Ethernet
transceiver for 100BaseTX, 100BaseFX and 10BaseT. It is compliant with IEEE 802.3, 802.3u
specification. Auto cross-over function is supported on TP terminal and the network status of
W89C841F is indicated by 3 LED pins. W89C841F supports full/half duplex, asymmetrical flow control
operation compliant with IEEE 802.3x and VLAN tagged frame compliant with IEEE 802.1p.
According to different applications, W89C841F can be configured into one of 3 modes to operate by
setting the pins CONFIG[1:0] and ModeSel[2:0] after power-on reset. The 3 operational modes of
W89C841F are listed as below.
1. PCI Ethernet MAC controller with internal Ethernet PHYceiver.
2. Pure PCI Ethernet MAC Controller
3. Pure 10/100M PHYceiver
W89C841F provides a host bus interface complying with the PCI local bus specification R2.2, Mini PCI
Specification R1.0 and CardBus. W89C841F plays as a bus master role to improve network
performance and reduce the bus utilization. There are built-in 2K bytes TX FIFO and 2K bytes RX
FIFO to store data. The DMA controller handles the data transfer between the host memory and the
FIFOs. The data received from network are queued into the RX FIFO then directly moved into the host
memory through the PCI bus. On the other hand, the transmitted data are fetched from the host
memory and directly queued into the transmit FIFO. No extra on-board memory is needed for data
buffering during operation.
For PC99/2001, W89C841F implements power management function that are compliant with
Advanced Configuration and Power Interface (ACPI) specification R1.0, PCI Power Management
Interface specification R1.1 and Network Device Class Power Management Reference specification
V1.0a. W89C841F supports D3cold power management state if auxiliary power is detected. 3 types of
wakeup events are acceptable like link status change, Magic Packet and 5 sets of wake-up frames.
EEPROM (93C46) is supported by W89C841F to store configuration and Vital Product Data (VPD)
information. The length of VPD information is up to 64 bytes. W89C841F can access the CardBus
information Structure (CIS) information that is stored at EEPROM (93C56) or BootROM. W89C841F
also supports BootROM/Flash interface to read/write BootROM or Flash memory.
transceiver for 100BaseTX, 100BaseFX and 10BaseT. It is compliant with IEEE 802.3, 802.3u
specification. Auto cross-over function is supported on TP terminal and the network status of
W89C841F is indicated by 3 LED pins. W89C841F supports full/half duplex, asymmetrical flow control
operation compliant with IEEE 802.3x and VLAN tagged frame compliant with IEEE 802.1p.
According to different applications, W89C841F can be configured into one of 3 modes to operate by
setting the pins CONFIG[1:0] and ModeSel[2:0] after power-on reset. The 3 operational modes of
W89C841F are listed as below.
1. PCI Ethernet MAC controller with internal Ethernet PHYceiver.
2. Pure PCI Ethernet MAC Controller
3. Pure 10/100M PHYceiver
W89C841F provides a host bus interface complying with the PCI local bus specification R2.2, Mini PCI
Specification R1.0 and CardBus. W89C841F plays as a bus master role to improve network
performance and reduce the bus utilization. There are built-in 2K bytes TX FIFO and 2K bytes RX
FIFO to store data. The DMA controller handles the data transfer between the host memory and the
FIFOs. The data received from network are queued into the RX FIFO then directly moved into the host
memory through the PCI bus. On the other hand, the transmitted data are fetched from the host
memory and directly queued into the transmit FIFO. No extra on-board memory is needed for data
buffering during operation.
For PC99/2001, W89C841F implements power management function that are compliant with
Advanced Configuration and Power Interface (ACPI) specification R1.0, PCI Power Management
Interface specification R1.1 and Network Device Class Power Management Reference specification
V1.0a. W89C841F supports D3cold power management state if auxiliary power is detected. 3 types of
wakeup events are acceptable like link status change, Magic Packet and 5 sets of wake-up frames.
EEPROM (93C46) is supported by W89C841F to store configuration and Vital Product Data (VPD)
information. The length of VPD information is up to 64 bytes. W89C841F can access the CardBus
information Structure (CIS) information that is stored at EEPROM (93C56) or BootROM. W89C841F
also supports BootROM/Flash interface to read/write BootROM or Flash memory.
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