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AM1705 Sitara 處理器

數(shù)據(jù):

描述

AM1705是一款基于ARM926EJ-S的低功耗ARM微處理器。

該設(shè)備可用于原始設(shè)備制造商(OEM) )和原始設(shè)計(jì)制造商(ODM)通過(guò)完全集成的混合處理器解決方案的最大靈活性,快速將具有強(qiáng)大操作系統(tǒng),豐富用戶界面和高處理器性能的設(shè)備推向市場(chǎng)。

ARM926EJ -S是一個(gè)32位RISC處理器內(nèi)核,可執(zhí)行32位或16位指令并處理32位,16位或8位數(shù)據(jù)。核心使用流水線操作,以便處理器和內(nèi)存系統(tǒng)的所有部分可以連續(xù)運(yùn)行。

ARM內(nèi)核具有協(xié)處理器15(CP15),保護(hù)模塊以及數(shù)據(jù)和程序存儲(chǔ)器管理單元(MMU)表后備緩沖區(qū)。 ARM內(nèi)核具有單獨(dú)的16KB指令和16 KB數(shù)據(jù)高速緩存。兩個(gè)內(nèi)存塊都與虛擬索引虛擬標(biāo)記(VIVT)進(jìn)行4向關(guān)聯(lián)。 ARM內(nèi)核還具有8KB的RAM(向量表)和64KB的ROM。

外設(shè)集包括:具有管理數(shù)據(jù)輸入/輸出(MDIO)模塊的10/100 Mbps以太網(wǎng)MAC(EMAC) ;兩個(gè)I 2 C總線接口;三個(gè)帶有串行器和FIFO緩沖器的多通道音頻串行端口(McASP);兩個(gè)64位通用定時(shí)器,每個(gè)都可配置(一個(gè)可配置為看門狗);多達(dá)8個(gè)16引腳的通用輸入/輸出(GPIO),具有可編程中斷/事件生成模式,與其他外設(shè)復(fù)用;三個(gè)UART接口(一個(gè)具有 RTS CTS );三個(gè)增強(qiáng)型高分辨率脈沖寬度調(diào)制器(eHRPWM)外設(shè);三個(gè)32位增強(qiáng)型捕獲(eCAP)模塊外設(shè),可配置為3個(gè)捕獲輸入或3個(gè)輔助脈沖寬度調(diào)制器(APWM)輸出;兩個(gè)32位增強(qiáng)型正交編碼脈沖(eQEP)外設(shè);和2個(gè)外部存儲(chǔ)器接口:用于較慢存儲(chǔ)器或外設(shè)的異步和SDRAM外部存儲(chǔ)器接口(EMIFA),以及用于SDRAM的高速存儲(chǔ)器接口(EMIFB)。

以太網(wǎng)媒體訪問控制器(EMAC)提供設(shè)備和網(wǎng)絡(luò)之間的有效接口。 EMAC支持10Base-T和100Base-TX,或半雙工或全雙工模式下的10 Mbps和100 Mbps。此外,MDIO接口可用于PHY配置。

I 2 C,SPI和USB2.0端口允許設(shè)備輕松控制外圍設(shè)備和/或與主機(jī)處理器通信。

豐富的外設(shè)集提供了控制外部外圍設(shè)備和與外部處理器通信的能力。有關(guān)每個(gè)外設(shè)的詳細(xì)信息,請(qǐng)參閱本文檔后面的相關(guān)章節(jié)以及相關(guān)的外設(shè)參考指南。

該器件具有一整套用于ARM處理器的開發(fā)工具。這些工具包括C編譯器和Windows®調(diào)試器接口,用于查看源代碼執(zhí)行情況。

特性

  • 375- and 456-MHz ARM926EJ-S™ RISC Core
    • 32-Bit and 16-Bit (Thumb®) Instructions
    • Single-Cycle MAC
    • ARM Jazelle® Technology
    • Embedded ICE-RT™ for Real-Time Debug
  • ARM9 Memory Architecture
    • 16KB of Instruction Cache
    • 16KB of Data Cache
    • 8KB of RAM (Vector Table)
    • 64KB of ROM
  • Enhanced Direct Memory Access Controller 3 (EDMA3):
    • 2 Transfer Controllers
    • 32 Independent DMA Channels
    • 8 Quick DMA Channels
    • Programmable Transfer Burst Size
  • 128KB of RAM Memory
  • 3.3-V LVCMOS I/Os (Except for USB Interface)
  • Two External Memory Interfaces:
    • EMIFA
      • NOR (8-Bit-Wide Data)
      • NAND (8-Bit-Wide Data)
    • EMIFB
      • 16-Bit SDRAM With 128-MB Address Space
  • Three Configurable 16550-Type UART Modules:
    • UART0 With Modem Control Signals
    • 16-Byte FIFO
    • 16x or 13x Oversampling Option
    • Autoflow Control Signals (CTS, RTS) on UART0 Only
  • Two Serial Peripheral Interfaces (SPIs) Each With One Chip Select
  • Programmable Real-Time Unit Subsystem (PRUSS)
    • Two Independent Programmable Real-Time Unit (PRU) Cores
      • 32-Bit Load-Store RISC Architecture
      • 4KB of Instruction RAM per Core
      • 512 Bytes of Data RAM per Core
      • PRUSS can be Disabled Through Software to Save Power
    • Standard Power-Management Mechanism
      • Clock Gating
      • Entire Subsystem Under a Single PSC Clock Gating Domain
    • Dedicated Interrupt Controller
    • Dedicated Switched Central Resource
  • Multimedia Card (MMC)/Secure Digital (SD) Card Interface With Secure Data I/O (SDIO)
  • Two Master and Slave Inter-Integrated Circuit (I2C Bus™)
  • USB 2.0 OTG Port With Integrated PHY (USB0)
    • USB 2.0 Full-Speed Client
    • USB 2.0 Full- and Low-Speed Host
    • End Point 0 (Control)
    • End Points 1, 2, 3, and 4 (Control, Bulk, Interrupt, or ISOC) RX and TX
  • Two Multichannel Audio Serial Ports (McASPs):
    • Six Clock Zones and 28 Serial Data Pins
    • Supports TDM, I2S, and Similar Formats
    • FIFO Buffers for Transmit and Receive
  • 10/100 Mbps Ethernet MAC (EMAC):
    • IEEE 802.3 Compliant (3.3-V I/O Only)
    • RMII Media-Independent Interface
    • Management Data I/O (MDIO) Module
  • One 64-Bit General-Purpose Timer (Configurable as Two 32-Bit Timers)
  • One 64-Bit General-Purpose Watchdog Timer (Configurable as Two 32-Bit General-Purpose Timers)
  • Three Enhanced Pulse Width Modulators (eHRPWMs):
    • Dedicated 16-Bit Time-Base Counter With Period and Frequency Control
    • 6 Single-Edge, 6 Dual-Edge Symmetric, or 3 Dual-Edge Asymmetric Outputs
    • Dead-Band Generation
    • PWM Chopping by High-Frequency Carrier
    • Trip Zone Input
  • Three 32-Bit Enhanced Capture (eCAP) Modules:
    • Configurable as 3 Capture Inputs or 3 Auxiliary Pulse Width Modulator (APWM) Outputs
    • Single-Shot Capture of up to Four Event Timestamps
  • Two 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • 176-Pin PowerPAD™ Plastic Quad Flat Pack [PTP suffix], 0.5-mm Pin Pitch
  • Commercial, Industrial, or Extended Temperature

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參數(shù) 與其它產(chǎn)品相比 AM1x

 
Arm MHz (Max.)
DRAM
Display
USB
EMAC
SPI
I2C
UART
Operating Temperature Range (C)
Approx. Price (US$)
AM1705 AM1707
375
456    
375
456    
SDRAM     SDRAM    
  1 LCD    
  1    
10/100     10/100    
2     2    
2     2    
3     3    
-40 to 105
-40 to 90
0 to 90    
-40 to 105
-40 to 90
0 to 90    
7.28 | 1ku     7.69 | 1ku    

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