Systematic Methodology for Rea

Electronic systems that use CPUs or processing platforms to perform a
specific function that is known up-front, are generally known as embedded
systems. This is especially so when they are neither used nor perceived as
computers [240]. Embedded systems are widely deployed in consumer products
that we use everyday, such as TV sets, automobiles, mobile phones. In
fact, International Data Corporation (IDC) reports that of the nearly 2 billion
microprocessor chips manufactured each year, over 95% go into non-PC
“embedded” devices.
The ever-progressing semiconductor processing technique has dramatically
increased the number of transistors on a single chip, which makes
today’s embedded processors increasingly powerful and efficient. Sophisticated
multiprocessor system-on-chips (MP-SoCs) have been used in the
high-end embedded systems. On the other hand, the gap between the semiconductor
processing capability and integrated circuit (IC) design capability is
constantly increasing, due to the faster growth of processing capability (58%
per year) against the growth of design capability (21% per year). This design
productivity gap is increasing the design cost rapidly. Another problem that
the designers will confront is the extremely high manufacturing non-recurring
engineering (NRE) cost. As the semiconductor industry approaches the sub-
100 nm technology node, the NRE (mask set and probe card) costs are getting
close to $1 million for a large IC. With an average of just 500 wafers
produced from each mask set, rapid growth of manufacturing NRE can throttle
the initiation of new IC design projects. As a result of the high IC design
and NRE cost, and also due to the stringent time-to-market deadlines, more
and more functionalities which used to be implemented in ASICs are migrating
to embedded processors, and in general “processing platforms” [194].
Conventional embedded system design techniques that rely on manual partitioning
and scheduling of software components are clearly not able to meet
the requirements of today’s demanding software functionalities. The large
amount of software components which are present in embedded systems
require a novel high-level design methodology that can quickly explore the
of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms
design space and hence map them onto the multiple embedded processors
in an efficient manner.
In this chapter, we first give a brief description of the multiprocessor
SoC hardware platforms (Section 1.1). Then we identify the characteristics
of the demanding target applications (Section 1.2). After that, we discuss
the still missing design techniques to efficiently map the current and
future applications on the target hardware platforms, and hence introduce
our Task Concurrency Management (TCM) flow, a high-level embedded
software design methodology, to facilitate the embedded system design
(Section 1.3). We also provide already a brief related work comparison
then. Subsequently, we present the essential structure of the existing TCM
work flow (Section 1.4). Finally, we present a chapter overview of this book
(Section 1.5).